An arithmetic circuit over a field is a finite acyclic digraph computing a polynomial from variables and field constants using addition and multiplication gates. Sum gates may allow field-weighted linear combinations; this convention, gate arities, and the size measure must be specified. Unlike a formula, a circuit can share subcomputations. A circuit is syntactically homogeneous when variables have formal degree 1, constants degree 0, product gates add input degrees with multiplicity, and every sum gate has inputs of equal formal degree. Cancellation does not reset this assigned degree.
In the five-layer 
model, gate types from output to leaves alternate between sums and products, with
bottom sums reading leaves. Fan-in, fan-out, and support of bottom linear forms may
be unrestricted. Iterated matrix multiplication
provides a lower-bound example in this model.
